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使用FPGA开发板上的数码管显示数值，需要将数值转换成对应的BCD码，再通过七段译码器将数值显示在数码管上。我用除十取余的方法，用VHDL写了32位二进制数转BCD码代码。
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY BIN32_TO_BCD1 IS
PORT(
BIN: IN STD_LOGIC_VECTOR(31 DOWNTO 0);
BCD: OUT STD_LOGIC_VECTOR(39 DOWNTO 0)
);
END ENTITY BIN32_TO_BCD1;
ARCHITECTURE RTL OF BIN32_TO_BCD1 IS
BEGIN
PROCESS(BIN)
VARIABLE TEMP: INTEGER;
VARIABLE BIN_TEMP: INTEGER;
VARIABLE BCD_TEMP: STD_LOGIC_VECTOR(39 DOWNTO 0);
BEGIN
BCD_TEMP:=X"0000000000";
BIN_TEMP:=CONV_INTEGER(BIN);
FOR K IN 0 TO 9 LOOP
TEMP:=BIN_TEMP REM 10;
BCD_TEMP(3+4*K DOWNTO K*4):=CONV_STD_LOGIC_VECTOR(TEMP,4);
BIN_TEMP:=(BIN_TEMP-TEMP)/10;
IF BIN_TEMP=0 THEN
EXIT;
END IF;
END LOOP;
BCD |