vivado怎么解决Unconstrained Logical Port [DRC UCIO

[DRC UCIO-1] Unconstrained Logical Port:3 out of 139 logical ports have no user assigned specific location constraint (LOC).

报错信息如下：[DRC UCIO-1] Unconstrained Logical Port: 3 out of 139 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: rx_sht20, rx_ch2o, and rx_adc.

网络上的解决办法如下：

链接: https://blog.csdn.net/u012230668/article/details/105410101/. 这是网上提出的解决办法，我按照这个方法添加完tcl文件仍然无法解决，最后发现是xdc中的约束文件出了问题（注释和约束不能出现在同一行），更改后即能解决。