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Get Information clear JSmol Viewer clear first_page Download PDF settings Order Article Reprints Font Type: Arial Georgia Verdana Font Size: Aa Aa Aa Line Spacing: Column Width: Background: Open AccessCommunication Low-Energy Ion Implantation and Deep-Mesa Si-Avalanche Photodiodes with Improved Fabrication Process by![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() Abstract: Since the avalanche phenomenon was first found in bulk materials, avalanche photodiodes (APDs) have been exclusively investigated. Among the many devices that have been developed, silicon APDs stand out because of their low cost, performance stability, and compatibility with CMOS. However, the increasing industrial needs pose challenges for the fabrication cycle time and fabrication cost. In this work, we proposed an improved fabrication process for ultra-deep mesa-structured silicon APDs for photodetection in the visible and near-infrared wavelengths with improved performance and reduced costs. The improved process reduced the complexity through significantly reduced photolithography steps, e.g., half of the steps of the existing process. Additionally, single ion implantation was performed under low energy (lower than 30 keV) to further reduce the fabrication costs. Based on the improved ultra-concise process, a deep-mesa silicon APD with a 140 V breakdown voltage was obtained. The device exhibited a low capacitance of 500 fF, the measured rise time was 2.7 ns, and the reverse bias voltage was 55 V. Moreover, a high responsivity of 103 A/W@870 nm at 120 V was achieved, as well as a low dark current of 1 nA at punch-through voltage and a maximum gain exceeding 1000. Keywords: silicon avalanche photodiode; multiple epitaxy technology; ion implantation 1. IntroductionAvalanche photodiodes (APDs) are widely used in various applications, such as medical imaging, sweeping robot guidance, light detection and ranging (LiDAR) [1], visible light communication [2,3], and single-photon detection [4,5,6], due to their internal amplification mechanism [7]. Compared to other types of sensors, silicon APDs work primarily by converting the incident light signal into an electrical signal and amplifying the current [8,9,10]. For near-IR wavelength applications (900~1100 nm), especially in weak light detection scenarios, silicon avalanche photodiodes are more popular compared to group III–V or II–VI compound semiconductor-based APDs and Ge/Si APDs [11,12], which is attributed to their low cost and compatibility with mature complementary metal–oxide–semiconductor (CMOS) technology.Silicon APDs currently predominantly employ a planar structure based on bulk silicon substrate, and for the planar fabrication processes, guard ring structures are required to prevent premature breakdown (PBD) [13,14]. Based on these designs, in 2004, I. Wegrzecka et al. discussed and summarized the planar structure developed at the Institute of Electron Technology (ITE) [7]; these photodiodes were optimized for high gain, high detectivity, and low noise, but the fabrication process was highly redundant, involving no less than seven photolithography steps and four ion implantation cycles (including high-energy ion implantation). In 2010, based on the CMOS process line, Woo-Suk Sul et al. employed a shallow trench as a guard ring [13], which reduced the cycles of ion implantation and thermal annealing (TA) at the edge of the active area, and effectively improved the fill factor to 67.1%. P.N. Aruev et al. also developed and fabricated an APD for the recording of IR signals with a leading and trailing pulse edge shorter than 3 ns using planar silicon chemical vapor deposition (CVD) technology in 2019 [15]. This APD exhibited a sensitivity of 80~85 A/W at wavelengths ranging from 900 to 1010 nm, and a dark current of 1.5 nA. However, this study only involved the epitaxial growth of a single layer of intrinsic silicon; thus, subsequent multiple steps of ion implantation and TA were still required in the fabrication process. In 2022, Liu et al. proposed a novel structure that eliminates the requirements for wafer-thinning and the double side metallization process compared with most commercial silicon APD products [16]. The structure was also based on intrinsic silicon and utilized a separated absorption charge (SACM) design. The fabrication process involved multiple high-energy ion implantation steps. Despite achieving a low temperature coefficient of 0.0077 V/K, the responsivity was only 0.22 A/W at 905 nm. Besides these, it has been reported that some mesa devices with photon-trapping microholes (PMTH) [17,18,19,20,21,22,23,24], which enhance the quantum efficiency for absorption in the visible and near-infrared spectral regions, have also been developed. However, the thinness of the absorption layer in the epitaxial structure results in low responsivity in the near-infrared (850~1064 nm) spectral wavelengths compared with planar structure silicon APD.To resolve the challenges in the fabrication steps, cost, and device’s overall performance, we proposed and fabricated an ultra-deep mesa-structure silicon APD with low-energy ion implantation, an ultra-concise fabrication process, and a quick optical pulse response. In this work, we demonstrate an improved fabrication process utilizing an ultra-deep mesa structure for silicon APDs targeting photodetection applications in the visible and near-infrared spectral wavelengths. The optimized process exhibits reduced complexity, with the number of photolithography and ion implantation steps reduced by at least half compared to most previously reported articles, to the best of our knowledge. Furthermore, low-energy ion implantation (below 30 keV) was implemented for the single ion implantation step. Based on this streamlined ultra-concise process, a deep-mesa silicon APD (DMSI-APD) with a 140 V breakdown voltage was fabricated. The resulting device displayed a low capacitance of 500 fF, consequently yielding a rapid optical pulse response time shorter than 2.7 ns. A high responsivity of 103 A/W@870 nm was also attained. Moreover, the dark current was suppressed below 1 nA at punch-through state and a maximum gain of over 1000 at 95% breakdown voltage was achieved. 2. Design and FabricationFor the design epilayer of the silicon DMSI-APD presented in this work, the traditional separate absorption and multiplication (SAM) structure in the silicon APD is employed. However, unlike previously reported silicon APD fabrication processes, the main working layers in this paper were formed using multiple thick silicon CVD instead of ion implantation and a long-time thermal annealing drive in. Consequently, changes in the epilayer, including doping concentration and thickness, will influence the performance of the fabricated APDs, including dark current, breakdown voltage, and peak responsivity. In a previous study, we simulated the impact of the epi-absorption layer and the epi-multiplication layer on device performance [25]. The spreading resistance profile (SRP) measurement results of the epitaxial wafer are depicted in Figure 1a, while Figure 1b presents the cross-section schematic of the fabricated DMSI-APD. The device epilayer consists of an epi-absorption layer (A-layer) and a multiplication layer (M-layer), which are grown on a low-resistivity substrate using CVD technology. The A-layer and M-layer have a doping concentration and thickness of 1 × 1014 cm−3, 85 μm, 3.5 × 1015 cm−3, and 5 μm, respectively. All of these working layers were grown at 800~1000 °C. Furthermore, the thickness of the doping gradient layer from the substrate to the absorption layer and from the absorption layer to the multiplication layer is 10 µm and 2 µm, respectively, as shown in Figure 1a.To elucidate the fabrication process of the device more clearly, the improved ultra-concise process flow is shown in Figure 2. The fabrication consisted of four main steps. First, the epi-wafer was cleaned using buffered oxide etch to remove the natural oxide layer from the surface of the grown wafer (step (i) in Figure 2), followed by standard silicon wafer cleaning processes (organic reagents as well as strong acid reagents). Second, the p–n junction was formed through low-energy phosphorus implantation at 30 keV with a dose of 2 × 1015 cm−2 (step (ii) in Figure 2). Afterwards, the implanted dopants were activated and the implantation damage was repaired through rapid thermal annealing (RTA) with annealing parameters of 1050 °C for 60 s. Third, the first photolithography was performed and the ultra-deep mesa was etched using inductively coupled plasma (ICP) etching, resulting in a mesa depth of approximately 107 μm, as shown in Figure 3a. In addition, the etching gas was C4F8 and S6F (flow ratio 1:1.2) and the etching temperature was 180 °C, the ICP etch rate was around 0.5 μm/cycle, and a total of 200 cycles were performed in the etch process. Next, the dry etched mesa sidewalls were passivated with silicon dioxide (SiO2), dry-oxidized for 2 h, and wet-oxidized for 15 min at 1050 °C and 600 °C, respectively (step (iii) in Figure 2). Fifth, the second photolithography was completed and an electric injection channel was etched out, followed by the deposition and patterning of Ti/Au alloy to form the metal pads. Finally, the third photolithography was finished and another Ti/Au alloy contact was deposited after chemical–mechanical polishing (CMP) on the backside (step (iv) in Figure 2). Figure 2 (v) and Figure 3b show the three-dimensional (3D)-rendered illustration and the final optical microscopy image of the fabricated DMSI-APD, respectively. Figure 3a also shows the etch profile of the device, with an etch depth of about 107 μm for the mesa, from which it can be seen that the sidewall is about 90° steep, with a good etch sidewall roughness. The top table surface in Figure 3b is the active region of the device, and the inside of the metal ring is the photosensitive surface of the device. The shadows around the active region in Figure 3b are due to the significant drop in device height. Compared with other existing silicon APD fabrication processes [7], the proposed whole fabrication process of the improved DMSI-APD requires only three steps of standard contact UV lithography, and furthermore, the active region is formed with just one low-energy ( |
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